tools/epro2/kicad: hierarchical export + global_label + 5-Voltage power ports
Three coupled changes so kicad-cli sch erc runs at the project level (across all sheets of one schematic) instead of single-sheet: 1. (label) → (global_label (shape passive)). EPRO2 nets are project-global by construction (named rails span every page in the SCH and physically wire across PCBs); KiCad's local label is sheet- scoped and triggers `label_dangling` for any name not duplicated on the same page. 2. New root_sch_writer that groups SCH_PAGE docs by their parent SCH (META.schematic), emits one root .kicad_sch per group with one (sheet ...) entry per child, and threads the root-assigned uuid back into each child's (sheet_instances) so KiCad can bind them. --all-sch now defaults to this; --flat falls back to one-file-per-page. 3. EPRO2's "5-Voltage" placeholder COMPONENT (partId pid8a0e77bacb214e, 365 instances on ESP-VoCat) is the editor's power port. The rail name lives in the placement's `Global Net Name` ATTR, not in the PART. We now emit a (global_label "<rail>") at the placement coords whenever that attr is set (101/365 of them on ESP-VoCat — the rest are unconfigured drafts). ESP-VoCat 5 hierarchical roots: 2325 → 2265 violations. Modest because 5 of 6 SCHs are single-page (no cross-sheet nets to resolve), and the one 4-page schematic (CoreBoard) shares only a handful of names across sheets — most net names are de-facto sheet-local. The remaining ~190 pin_not_connected are dominated by 0402-style passives whose pin tip lies on a wire's interior, not at an endpoint; KiCad needs an explicit (junction) at those points and we don't yet emit one. Marked as the next follow-up in log.md. 47 → 52 unit tests pass. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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tools/epro2/tests/test_root_sch_writer.py
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68
tools/epro2/tests/test_root_sch_writer.py
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"""Root sheet writer regression: hierarchical parent .kicad_sch."""
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from tools.epro2.kicad._sexpr_reader import parse
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from tools.epro2.kicad.root_sch_writer import ChildSheet, write_root_sheet
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def _block(parsed, name):
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return [c for c in parsed if isinstance(c, list) and c and c[0] == name]
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def test_root_emits_one_sheet_block_per_child():
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children = [
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ChildSheet("Overview.kicad_sch", "Overview", "uuid-1"),
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ChildSheet("MCU.kicad_sch", "MCU", "uuid-2"),
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ChildSheet("Codec.kicad_sch", "Codec", "uuid-3"),
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]
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parsed = parse(write_root_sheet("CoreBoard", children))
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sheets = _block(parsed, "sheet")
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assert len(sheets) == 3
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# Each sheet block carries the assigned uuid + Sheetname + Sheetfile
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titles = []
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files = []
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uuids = []
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for sh in sheets:
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uuids.append(next(c for c in sh if isinstance(c, list) and c[0] == "uuid")[1])
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for c in sh:
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if isinstance(c, list) and c[0] == "property":
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if c[1] == "Sheetname":
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titles.append(c[2])
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elif c[1] == "Sheetfile":
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files.append(c[2])
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assert titles == ["Overview", "MCU", "Codec"]
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assert files == ["Overview.kicad_sch", "MCU.kicad_sch", "Codec.kicad_sch"]
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assert uuids == ["uuid-1", "uuid-2", "uuid-3"]
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def test_root_assigns_sequential_page_numbers_starting_at_2():
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"""Root itself is page 1 of the hierarchy; children start at page 2 so
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that a child's (sheet_instances (page "<n>")) lines up with the root's
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(instances ... (page "<n>"))."""
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children = [
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ChildSheet("a.kicad_sch", "A", "u-a"),
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ChildSheet("b.kicad_sch", "B", "u-b"),
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]
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parsed = parse(write_root_sheet("Project", children))
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sheets = _block(parsed, "sheet")
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page_nums = []
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for sh in sheets:
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inst = next(c for c in sh if isinstance(c, list) and c[0] == "instances")
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proj = next(c for c in inst if isinstance(c, list) and c[0] == "project")
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path = next(c for c in proj if isinstance(c, list) and c[0] == "path")
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page = next(c for c in path if isinstance(c, list) and c[0] == "page")
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page_nums.append(page[1])
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assert page_nums == ["2", "3"]
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# And the root's own page is 1
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root_inst = _block(parsed, "sheet_instances")[0]
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root_path = next(c for c in root_inst if isinstance(c, list) and c[0] == "path")
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root_page = next(c for c in root_path if isinstance(c, list) and c[0] == "page")
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assert root_page[1] == "1"
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def test_root_handles_zero_children():
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"""Empty schematic: still emit a valid kicad_sch with no (sheet) blocks."""
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parsed = parse(write_root_sheet("Empty", []))
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assert parsed[0] == "kicad_sch"
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assert _block(parsed, "sheet") == []
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# sheet_instances still required (KiCad demands at least one path)
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assert _block(parsed, "sheet_instances")
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