Run on dev1 (Guangzhou) for the latency advantage. Walltime 3:41 vs
Singapore-estimated 1-2h (~30x speedup, mostly from image.lceda.cn
RTT going from 263ms to 2.6ms).
Pro 25: 24 ok + 1 fail (Super Dial 7f7565ef11 — Pro 2.x legacy
schematic/lists 401, separate cookie-perm issue)
611 docs, 31 MB total
Std 25: 25 ok, 97 docs, 74 MB total
Combined: 49/50 success, 708 docs, 105 MB new disk usage
--max-source-mb 200 cap was not tripped; the 25 Pro candidates are all
under 10 MB, so the 481 MB X86-board outlier from the original sample
was not representative.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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4 lines
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{"type":"DOCHEAD","ticket":589}||{"docType":"DEVICE","client":"1c36d9ea-78b8-433b-9aa2-d8266888aa7e","uuid":"eca75673979b4492b639d8f9e7af312d","updateTime":1703492166000,"version":"1653290882","user":{"uuid":"1f391f553d454e5aaee93777ca35939c","nickname":"嘉立创EDA-牧尘","username":"chenlong11","avatar":"//image.lceda.cn/avatars/2023/12/UTs5pVp0XlYjeATux1aMrBnTte7JYbr7GycoW78M.png"}}|
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{"type":"META","ticket":590,"id":"META"}||{"title":"HDR-M_2.54_1x4P","tags":["连接器","排针"],"source":"d5e86a4f70d24c6c950b9ff10d30894b|0819f05c4eef4c71ace90d822a990e87","images":[""],"attributes":{"Convert to PCB":"yes","Add into BOM":"yes","Designator":"H?","Supplier Part":"C492403","Supplier Footprint":"插件","Symbol":"5b68a537053248d5bd947e691084a9ff","Footprint":"95f60ca3d2ab4f6ea0eb73b07d3309b3","3D Model":"112f4d05e8d64e99ab9a333894bea4f9","3D Model Title":"HDR-TH_4P-P2.54-M-LI-1X4P","3D Model Transform":"399.999,104.7242,0,0,0,0,0,0,-118.11","Description":""}}|
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