tools/epro2/kicad: fix two structural ERC bugs — wire_dangling -88%, pin_not_connected -52%

Bisect found two semantics mismatches between EPRO2 and KiCad that cause
the 850 real-connectivity ERC violations on the ESP-VoCat ref project:

1. sym_writer was emitting lib coords without negating Y, but KiCad lib
   uses Y-up and re-flips Y on placement (Y-down schematic). So vertically
   arranged pins ended up at Y-mirrored absolute positions and wires that
   reach the geometric pin tip in EPRO2 missed the rendered pin tip in
   KiCad. Fix: lib_y = -epro2_y, lib_rot = (360 - rot) % 360 for pin/text.

2. sch_writer was treating each LINE as an isolated wire — but EPRO2
   binds segments into nets by NAME (WIRE.NET attr), not just geometry.
   Multi-segment nets like GND/VBUS show up as N disconnected stubs to
   KiCad. Fix: per-LINE, look up lineGroup → WIRE → NET attr and emit a
   `(label "<NET>")` at the LINE's start. Same-named labels on distinct
   physical wires is how KiCad's ERC recognizes a multi-segment net.

ESP-VoCat 9 sheets:
  wire_dangling           444 →  52  (-88%)
  pin_not_connected       406 → 196  (-52%)
  real connectivity total 850 → 248  (-71%)

Why we did NOT round to grid (the obvious-looking fix): EPRO2 places
some pins on a 10-mil pitch (e.g. magnetic socket); rounding to KiCad's
default 50-mil ERC grid would collapse those pins. The 248 residual is
fundamentally cross-sheet — single-sheet ERC can't see a net's other
endpoints on sibling sheets — and is a Phase-3 (hierarchical sheet)
problem, not a per-sheet one.

41 → 46 unit tests pass.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

tools/epro2/tests/test_sch_writer.py

@@ -100,6 +100,46 @@ def test_text_object_emits_text_block_when_non_empty():
     assert texts[0][1] == "Hello"
 
 
+def test_named_wire_emits_label_at_line_start():
+    """EPRO2 binds wire segments into nets by NAME (WIRE.NET attr), not by
+    geometry alone. Each LINE whose lineGroup points to a WIRE with a NET
+    attr must get a (label "<NET>") at one endpoint — same-named labels on
+    distinct LINEs are how KiCad's ERC recognizes a multi-segment net."""
+    d = _doc([
+        ("w1", {"_type": "WIRE"}),
+        ("a1", {"_type": "ATTR", "parentId": "w1", "key": "NET", "value": "GND"}),
+        ("ln1", {"_type": "LINE", "lineGroup": "w1",
+                 "startX": 100, "startY": 0, "endX": 200, "endY": 0}),
+        ("ln2", {"_type": "LINE", "lineGroup": "w1",
+                 "startX": 300, "startY": 0, "endX": 400, "endY": 0}),
+    ])
+    text = write_sch_page(d, sheet_origin_mm=(0.0, 0.0))
+    p = parse(text)
+    labels = _block(p, "label")
+    assert len(labels) == 2  # one label per non-degenerate LINE
+    assert all(lab[1] == "GND" for lab in labels)
+    # First label sits at the first LINE's start endpoint
+    at = next(c for c in labels[0] if isinstance(c, list) and c[0] == "at")
+    assert at[1] == 100 * MIL_TO_MM
+    assert at[2] == 0.0
+    assert getattr(write_sch_page, "last_stats").labels == 2
+
+
+def test_unnamed_wire_emits_no_label():
+    """A WIRE without a NET attr (or a LINE without a lineGroup) gets no
+    label — emitting a label without a name would be syntactically invalid
+    and semantically meaningless."""
+    d = _doc([
+        ("w1", {"_type": "WIRE"}),  # no NET attr
+        ("ln1", {"_type": "LINE", "lineGroup": "w1",
+                 "startX": 0, "startY": 0, "endX": 100, "endY": 0}),
+    ])
+    text = write_sch_page(d, sheet_origin_mm=(0.0, 0.0))
+    p = parse(text)
+    assert _block(p, "label") == []
+    assert getattr(write_sch_page, "last_stats").labels == 0
+
+
 def test_non_sch_page_doc_rejected():
     d = Document(doc_uuid="x", doc_type="PCB")
     try: