Run on dev1 (Guangzhou) for the latency advantage. Walltime 3:41 vs
Singapore-estimated 1-2h (~30x speedup, mostly from image.lceda.cn
RTT going from 263ms to 2.6ms).
Pro 25: 24 ok + 1 fail (Super Dial 7f7565ef11 — Pro 2.x legacy
schematic/lists 401, separate cookie-perm issue)
611 docs, 31 MB total
Std 25: 25 ok, 97 docs, 74 MB total
Combined: 49/50 success, 708 docs, 105 MB new disk usage
--max-source-mb 200 cap was not tripped; the 25 Pro candidates are all
under 10 MB, so the 481 MB X86-board outlier from the original sample
was not representative.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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4 lines
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{"type":"DOCHEAD","ticket":378}||{"docType":"DEVICE","client":"4d32fc57-d8c1-42a9-b5b1-ef12efa00ebe","uuid":"22a7ba472b5441a38a9674baca826773","updateTime":1734253540000,"version":"1653297119","user":{"uuid":"f5e5983cd8e94ba3b7f01b6e21d709b8","nickname":"Sngels_wyh","username":"sngelswyh","avatar":"//image.lceda.cn/avatars/2024/12/s9etBtOA1q39LNLVZsfmkSrhj2DlgmIL2wFnv7f1.webp"}}|
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{"type":"META","ticket":379,"id":"META"}||{"title":"HDR-F_2.54_1x4P","tags":["连接器","排母"],"source":"18597ac557f74c9e9a5a41efc24f7b91|0819f05c4eef4c71ace90d822a990e87","images":[""],"attributes":{"Convert to PCB":"yes","Add into BOM":"yes","Designator":"H?","Supplier Part":"C2718488","Supplier Footprint":"插件","Symbol":"b67ce76af3084de28982579ac53a1f2e","Footprint":"04d8ddd07603412fb08552207f3008de","3D Model":"57daaad411c24bd7bd5d06edf5c4d16b","3D Model Title":"HDR-TH_4P-P2.54-F-LI-1X4P","3D Model Transform":"415.7472,98.425,0,0,0,0,0,0,-118.11","Description":""}}|
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