Run on dev1 (Guangzhou) for the latency advantage. Walltime 3:41 vs
Singapore-estimated 1-2h (~30x speedup, mostly from image.lceda.cn
RTT going from 263ms to 2.6ms).
Pro 25: 24 ok + 1 fail (Super Dial 7f7565ef11 — Pro 2.x legacy
schematic/lists 401, separate cookie-perm issue)
611 docs, 31 MB total
Std 25: 25 ok, 97 docs, 74 MB total
Combined: 49/50 success, 708 docs, 105 MB new disk usage
--max-source-mb 200 cap was not tripped; the 25 Pro candidates are all
under 10 MB, so the 481 MB X86-board outlier from the original sample
was not representative.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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{"type":"META","ticket":554,"id":"META"}||{"title":"EC11L1525E05","tags":[],"source":"66220b0bee5957496c5a483a0ed24d82|0017cd61f7d742d98373eae74300c867","images":[],"attributes":{"Designator":"SW?","Symbol":"c3f6e13a35004f06bbb70956c946330c","Supplier":"LCSC","Supplier Part":"C2687298","Manufacturer":"ALPSALPINE(阿尔卑斯阿尔派)","Manufacturer Part":"EC11L1525E05","JLCPCB Part Class":"Extended Part","Convert to PCB":"yes","Add into BOM":"yes","Footprint":"f87755625fe7407db741fa2f43c9a1d6","Name":"EC11L1525E05","Description":""}}|
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