Phase-1 scope: produce a .kicad_pcb that kicad-cli loads cleanly and
that has the right geometry (nets, footprints, tracks, vias, board
outline) — not a 1:1 EDA round-trip. Skipped on purpose for Phase 2:
copper pours (POUR/POURED), manual FILL, teardrops, board-level
strings/images, ARC circle-center recovery.
What lands:
- pcb_writer.write_pcb(): header/general, data-driven layer table
(F.Cu = ord 0; B.Cu = ord 31; SIGNAL inner ids 15+ allocated to
In1.Cu/In2.Cu/... in EPRO2-id sorted order so used inner layers
stay contiguous), net-name → integer id map (id 0 reserved for the
empty net per KiCad convention), LINE→segment / LINE→gr_line on
Edge.Cuts, layer-11 POLY paths walked into Edge.Cuts gr_line chains
(the actual board outline lives on POLY here, not LINE — without
this stats showed edge=0), VIA→via.
- footprint_writer.write_footprint_placement(): inline (footprint ...)
blocks per PCB COMPONENT. EPRO2 RECT/ELLIPSE/OVAL/POLYGON pad
shapes mapped to KiCad rect/circle/oval/custom; SMD vs THT detected
by PAD.hole presence; SLOT holes use (drill oval w h). Pad nets
resolved cross-doc via the existing PCB.PAD_NET → footprint.pad
chain in ProjectRelations. layerId=2 component → (layer B.Cu) +
text on B.SilkS so bottom-side parts render correctly.
Smoke test on ESP-VoCat (6 PCBs): all 6 pass `kicad-cli pcb export svg`
and render. DRC on smallest (MicBoard) reports 145 violations + 75
unconnected — most of the unconnected are GND nets that the EPRO2
source resolves through POUR copper, which Phase 2 will export.
CLI: `python -m tools.epro2.kicad <project> --all-pcb --out <dir>`
emits one .kicad_pcb per PCB doc.
52 → 65 unit tests pass. Float comparisons in tests use math.isclose
because the s-expr 6-decimal trim doesn't preserve strict equality
through `value * MIL_TO_MM` round-trips.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
241 lines
9.1 KiB
Python
241 lines
9.1 KiB
Python
"""CLI: convert EPRO2 SCH_PAGE docs to KiCad ``.kicad_sch`` files.
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Usage:
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uv run python -m tools.epro2.kicad <project_dir> --doc <sch_uuid> --out <dir>
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uv run python -m tools.epro2.kicad <project_dir> --all-sch --out <dir>
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uv run python -m tools.epro2.kicad <project_dir> --all-sch --flat --out <dir>
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By default ``--all-sch`` produces a hierarchical project: pages are grouped
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by their parent SCH (``META.schematic``) and each group gets a directory
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with a root ``.kicad_sch`` plus its child pages. ``kicad-cli sch erc`` on
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the root then resolves cross-page nets via ``(global_label)``. Pass
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``--flat`` to fall back to one file per page in a single directory (the
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old behaviour, still useful when you only care about a single page).
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"""
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from __future__ import annotations
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import argparse
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import re
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import sys
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from pathlib import Path
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from ..project_relations import ProjectRelations
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from ..replay import Document, Project, replay_project
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from .pcb_writer import write_pcb
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from .root_sch_writer import ChildSheet, new_sheet_uuid, write_root_sheet
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from .sch_writer import write_sch_page
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_SAFE_CHARS = re.compile(r"[^A-Za-z0-9._\-一-鿿]+")
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def _safe_filename(s: str) -> str:
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s = _SAFE_CHARS.sub("_", s).strip("_")
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return s or "untitled"
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def _page_title(doc: Document) -> str:
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return (doc.objects.get("META") or {}).get("title") or doc.doc_uuid[:12]
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def _print_stats(name: str) -> None:
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stats = getattr(write_sch_page, "last_stats", None)
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if stats:
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print(
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f" {name}: wires={stats.wires} symbols={stats.symbol_placements} "
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f"text={stats.text} labels={stats.labels} skipped={stats.skipped} "
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f"lib_emb={stats.lib_symbols_embedded} lib_miss={stats.lib_symbols_missing}"
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)
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def _convert_one_flat(
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proj: Project,
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doc_uuid: str,
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out_dir: Path,
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pr: ProjectRelations | None = None,
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) -> Path:
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"""Standalone single-page export — no hierarchy. Useful for inspecting one page."""
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if doc_uuid not in proj.documents:
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candidates = [u for u in proj.documents if u.startswith(doc_uuid)]
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if len(candidates) != 1:
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raise SystemExit(f"no unique match for {doc_uuid!r} (candidates: {candidates[:5]})")
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doc_uuid = candidates[0]
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doc = proj.documents[doc_uuid]
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if doc.doc_type != "SCH_PAGE":
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raise SystemExit(f"doc {doc_uuid} is {doc.doc_type!r}, not SCH_PAGE")
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text = write_sch_page(doc, project_relations=pr)
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out_path = out_dir / f"{_safe_filename(_page_title(doc))}_{doc_uuid[:8]}.kicad_sch"
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out_path.write_text(text, encoding="utf-8")
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_print_stats(out_path.name)
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return out_path
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def _group_pages_by_sch(proj: Project) -> dict[str, list[str]]:
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"""Group SCH_PAGE doc uuids by their parent SCH uuid (META.schematic).
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Pages without a META.schematic land in the bucket keyed by their own
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uuid (treated as a single-page schematic). Deleted SCHs (``DELETE_DOC``)
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are skipped — their pages are dropped silently.
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"""
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deleted_schs = {
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u for u, d in proj.documents.items()
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if d.doc_type == "SCH" and (d.objects.get("DELETE_DOC") or {}).get("isDelete")
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}
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out: dict[str, list[str]] = {}
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for u, d in proj.documents.items():
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if d.doc_type != "SCH_PAGE":
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continue
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meta = d.objects.get("META") or {}
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sch_uuid = str(meta.get("schematic") or u)
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if sch_uuid in deleted_schs:
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continue
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out.setdefault(sch_uuid, []).append(u)
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# Sort pages within each SCH by zIndex (the editor's tab order)
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for sch_uuid, pages in out.items():
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pages.sort(key=lambda u: (proj.documents[u].objects.get("META") or {}).get("zIndex") or 0)
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return out
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def _convert_hierarchical(
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proj: Project,
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out_dir: Path,
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pr: ProjectRelations | None,
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) -> int:
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"""Emit one root + N children per SCH group. Returns root count."""
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groups = _group_pages_by_sch(proj)
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if not groups:
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print("no SCH_PAGE docs in this project", file=sys.stderr)
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return 0
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root_count = 0
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for sch_uuid, page_uuids in groups.items():
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sch_doc = proj.documents.get(sch_uuid)
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sch_title = (
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(sch_doc.objects.get("META") or {}).get("title")
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if sch_doc and sch_doc.doc_type == "SCH"
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else None
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) or _page_title(proj.documents[page_uuids[0]])
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sch_dir = out_dir / _safe_filename(sch_title)
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sch_dir.mkdir(parents=True, exist_ok=True)
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print(f"Schematic '{sch_title}' ({len(page_uuids)} page(s)) → {sch_dir}")
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# Pre-assign each child a uuid and a filename; the child page
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# writer needs the uuid to declare its hierarchy path, and the
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# root needs both to emit its (sheet ...) entries.
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children: list[ChildSheet] = []
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for page_uuid in page_uuids:
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page_doc = proj.documents[page_uuid]
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title = _page_title(page_doc)
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children.append(ChildSheet(
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filename=f"{_safe_filename(title)}_{page_uuid[:8]}.kicad_sch",
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title=title,
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sheet_uuid=new_sheet_uuid(),
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))
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for idx, (page_uuid, child) in enumerate(zip(page_uuids, children)):
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page_doc = proj.documents[page_uuid]
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text = write_sch_page(
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page_doc,
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project_relations=pr,
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sheet_path=f"/{child.sheet_uuid}",
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page_num=idx + 2, # root takes page 1
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)
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(sch_dir / child.filename).write_text(text, encoding="utf-8")
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_print_stats(child.filename)
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root_text = write_root_sheet(sch_title, children, project_name=_safe_filename(sch_title))
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root_path = sch_dir / f"{_safe_filename(sch_title)}.kicad_sch"
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root_path.write_text(root_text, encoding="utf-8")
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print(f" ROOT: {root_path}")
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root_count += 1
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return root_count
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def _convert_all_pcb(proj: Project, out_dir: Path, pr: ProjectRelations) -> int:
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"""Emit one .kicad_pcb per PCB doc. Each is named after its META.title
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and dropped into a sibling directory of the matching SCH for parity
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with the schematic export layout."""
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pcb_uuids = [u for u, d in proj.documents.items() if d.doc_type == "PCB"]
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if not pcb_uuids:
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print("no PCB docs in this project", file=sys.stderr)
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return 0
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print(f"Converting {len(pcb_uuids)} PCB doc(s) → {out_dir}")
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n = 0
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for u in pcb_uuids:
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doc = proj.documents[u]
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title = (doc.objects.get("META") or {}).get("title") or u[:12]
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try:
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text = write_pcb(doc, project_relations=pr)
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except Exception as e: # noqa: BLE001
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print(f" FAIL {u[:12]}: {e}", file=sys.stderr)
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continue
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out_path = out_dir / f"{_safe_filename(title)}.kicad_pcb"
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out_path.write_text(text, encoding="utf-8")
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stats = getattr(write_pcb, "last_stats", None)
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if stats:
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print(
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f" {out_path.name}: nets={stats.nets} fps={stats.footprints} "
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f"fps_unresolved={stats.footprints_unresolved} "
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f"segments={stats.segments} vias={stats.vias} edge={stats.edge_cuts}"
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)
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n += 1
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return n
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def main(argv: list[str] | None = None) -> int:
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ap = argparse.ArgumentParser(description="EPRO2 → KiCad schematic + PCB exporter")
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ap.add_argument("project_dir", type=Path)
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g = ap.add_mutually_exclusive_group(required=True)
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g.add_argument("--doc", help="SCH_PAGE doc uuid (or unique prefix) to convert")
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g.add_argument("--all-sch", action="store_true", help="convert every SCH_PAGE")
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g.add_argument("--all-pcb", action="store_true", help="convert every PCB doc to .kicad_pcb")
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ap.add_argument("--out", type=Path, default=Path("data/processed/kicad_sch"))
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ap.add_argument(
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"--no-lib-symbols",
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action="store_true",
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help="skip lib_symbols generation (Phase 1 mode — placements only, red ?)",
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)
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ap.add_argument(
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"--flat",
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action="store_true",
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help="emit one flat .kicad_sch per page (no hierarchy); only with --all-sch or --doc",
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)
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args = ap.parse_args(argv)
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proj = replay_project(args.project_dir)
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args.out.mkdir(parents=True, exist_ok=True)
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pr = None if args.no_lib_symbols else ProjectRelations.build(proj)
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if args.all_pcb:
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if pr is None:
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pr = ProjectRelations.build(proj)
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_convert_all_pcb(proj, args.out, pr=pr)
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return 0
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if args.doc:
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_convert_one_flat(proj, args.doc, args.out, pr=pr)
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return 0
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if args.flat:
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targets = [u for u, d in proj.documents.items() if d.doc_type == "SCH_PAGE"]
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if not targets:
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print("no SCH_PAGE docs in this project", file=sys.stderr)
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return 1
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print(f"Flat mode: converting {len(targets)} SCH_PAGE docs → {args.out}")
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for u in targets:
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try:
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_convert_one_flat(proj, u, args.out, pr=pr)
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except Exception as e: # noqa: BLE001
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print(f" FAIL {u[:12]}: {e}", file=sys.stderr)
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return 0
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_convert_hierarchical(proj, args.out, pr=pr)
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return 0
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if __name__ == "__main__":
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raise SystemExit(main())
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